Patents

  1. Sidlgata V. Sreenivasan, Paras Ajay, Aseem Sayal, Mark Mcdermott, Shrawan Singhal, Ovadia Abed, Lawrence Dunn, Vipul Goyal, Michael Cullinan, “Heterogeneous integration of components onto compact devices using moire based metrology and vacuum based pick-and-place, filed, USPTO PCT/US2017/068328.
  2. Sidlgata V. Sreenivasan, Paras Ajay, Aseem Sayal, Ovadia Abed, Mark McDermott, Jaydeep Kulkarni, Shrawan Singhal, “Nanoscale-aligned 3D Stacked Integrated Circuit”, filed, USPTO PCT/US2018/067322.
  3. Sidlgata V. Sreenivasan, Paras Ajay, Aseem Sayal, Mark McDermott, Jaydeep Kulkarni, “Nanofabrication and Design Techniques for 3D ICs and Configurable ASICs, filed, USPTO PCT/US2019/049875.
  4. Sidlgata V. Sreenivasan, Ovadia Abed, Lawrence Dunn, Aseem Sayal, Shrawan Singhal, “Providing broad access to micro- and nano-scale technologies, filed, USPTO PCT/US2018/032890.
  5. Sidlgata V. Sreenivasan, Shrawan Singhal, Ovadia Abed, Lawrence Dunn, Aseem Sayal, Benjamin Eynon, “Portable system for providing broad access to micro- and nano-scale technologies, filed, USPTO PCT/US2017/023420.